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HWs/Labs

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Syllabus

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CPE 462 - VHDL: Simulation and Synthesis - Fall'11

HWs:

• [HW #1] [solutions] - Due Date September 9, 2011
• [HW #2] [solutions] - Due Date September 16, 2011
• [HW #3] [exercise #3 testbench][solutions] - Due Date September 26, 2011
• [HW #4] [solutions] - Due Date September 30, 2011
• [HW #5] [exercise #3 test-bench] [exercise #4 test-bench][solutions] - Due Date October 3, 2011
• [HW #6] [solutions] - Due Date October 5, 2011
• [HW #7] [solutions] - Due Date October 10, 2011
• [HW #8] [solutions] - Due Date October 14, 2011
• [HW #9] [solutions] - Due Date October 17, 2011
• [EXAM #1 and HW #10] [test-bench] [comments] [solutions] - Due Date October 21, 2011
• [HW #11] [exercise #1 test-bench] [exercise #1 waveform] [solutions] - Due Date October 26, 2011
• [HW #12] [solutions] - Due Date October 28, 2011
• [HW #13] [solutions] - Due Date November 02, 2011
• [HW #14] [solutions] - Due Date November 11, 2011
• [HW #15] [solutions] - Due Date November 16, 2011
• [HW #16] [partial solution] [solutions] - Due Date November 30, 2011
• [HW #17] [partial solution] [solutions] - Due Date December 05, 2011
• [HW #18] [solutions] - Due Date December 12, 2011

Exams:

• [Exam #1] [solutions]
• [Exam #2] [solutions]
• [Final Exam] [Turn-in times] [solutions]